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sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 sn74lvc1g11 single 3-input positive-and gate 1 features 3 description the sn74lvc1g11 performs the boolean function 1 ? available in the texas instruments in positive logic. nanofree ? package ? supports 5-v v cc operation nanofree package technology is a major breakthrough in ic packaging concepts, using the die ? inputs accept voltages to 5.5 v as the package. ? maximum t pd of 4.1 ns at 3.3 v this device is fully specified for partial-power-down ? low power consumption, 10- a maximum i cc applications using i off . the i off circuitry disables the ? 24-ma output drive at 3.3 v outputs, preventing damaging current backflow ? i off supports partial-power-down mode operation through the device when it is powered down. ? latch-up performance exceeds 100 ma device information (1) per jesd 78, class ii part number package body size (nom) ? esd protection exceeds jesd 22 sn74lvc1g11dbv sot-23 (6) 2.90 mm 1.60 mm ? 2000-v human-body model (a114-a) sn74lvc1g11dck sc70 (6) 2.00 mm 1.25 mm ? 200-v machine model (a115-a) sn74lvc1g11dry son (6) 1.45 mm 1.00 mm ? 1000-v charged-device model (c101) sn74lvc1g11dsf son (6) 1.00 mm 1.00 mm sn74lvc1g11yzp dsbga (6) 1.41 mm 0.91 mm 2 applications (1) for all available packages, see the orderable addendum at ? av receivers the end of the data sheet. ? dlp front projection system functional block diagram ? digital picture frames ? digital radio ? digital still cameras ? digital video cameras (dvc) ? embedded pcs ? e-books ? ethernet switchs ? gps: personal navigation devices ? handset: smartphones ? high-speed data acquisition and generation ? military: radar and sonar ? mobile internet devices ? notebook pc and netbooks ? network-attached storage (nas) ? power line communication modems ? server psu ? stb, dvr, and streaming media ? speakers: usb ? tablets: enterprise ? video broadcasting and infrastructure: scalable platform and ip-based multi-format transcoders ? wireless headsets, keyboards, and mice 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. ac y b y = a ? b ? c or y = a + b + c productfolder sample &buy technical documents tools & software referencedesign support &community
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com table of contents 1 features .................................................................. 1 8 detailed description ............................................ 10 8.1 overview ................................................................. 10 2 applications ........................................................... 1 8.2 functional block diagram ....................................... 10 3 description ............................................................. 1 8.3 feature description ................................................. 10 4 revision history ..................................................... 2 8.4 device functional modes ........................................ 10 5 pin configuration and functions ......................... 3 9 application and implementation ........................ 11 6 specifications ......................................................... 4 9.1 application information ............................................ 11 6.1 absolute maximum ratings ..................................... 4 9.2 typical application ................................................. 11 6.2 esd ratings ............................................................ 4 10 power supply recommendations ..................... 12 6.3 recommended operating conditions ...................... 5 11 layout ................................................................... 13 6.4 thermal information .................................................. 5 11.1 layout guidelines ................................................. 13 6.5 electrical characteristics ........................................... 6 11.2 layout example .................................................... 13 6.6 switching characteristics, c l = 15 pf, t a = ? 40 c to 85 c ........................................................................... 6 12 device and documentation support ................. 14 6.7 switching characteristics, c l = 30 pf or 50 pf, t a = 12.1 documentation support ........................................ 14 ? 40 c to 85 c ............................................................ 6 12.2 community resources .......................................... 14 6.8 switching characteristics, c l = 30 pf or 50 pf, t a = 12.3 trademarks ........................................................... 14 ? 40 c to 125 c .......................................................... 6 12.4 electrostatic discharge caution ............................ 14 6.9 operating characteristics .......................................... 7 13 mechanical, packaging, and orderable 6.10 typical characteristics ............................................ 7 information ........................................................... 14 7 parameter measurement information .................. 8 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision f (december2013) to revision g page ? added applications section, device information table, esd ratings table, thermal information table, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section. ..................................................................................................................... 1 changes from revision e (december 2011) to revision f page ? updated document to new ti data sheet format. ................................................................................................................... 1 ? removed ordering information table. .................................................................................................................................... 1 ? updated operating temperature range. .................................................................................................................................. 5 changes from revision d (january 2007) to revision e page ? added dry and dsf packages to data sheet ...................................................................................................................... 1 2 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11
sn74lvc1g11 www.ti.com sces487g ? september 2003 ? revised december 2015 5 pin configuration and functions dbv package dck package 6-pin sot-23 6-pin sc70 top view top view dry package 6-pin son top view yzp package 6-pin dsbga top view dsf package 6-pin son top view see mechanical drawings for dimensions. pin functions pin i/o description name no. a 1 i a input b 3 i b input c 6 i c input gnd 2 ? ground v cc 5 ? power supply y 4 o y output copyright ? 2003 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: sn74lvc1g11 gnd v cc a 6 5 4 2 3 b y c 1 2 gnd v cc 5 3 4 b y 6 1 a c 3 4 b 2 gnd y 5 1 a v cc 6 c a b gnd c y v cc 6 5 4 2 3 1 gnd v cc a b 21 3 y 5 46 c
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cc supply voltage ? 0.5 6.5 v v i input voltage (2) ? 0.5 6.5 v v o voltage applied to any output in the high-impedance or power-off state (2) ? 0.5 6.5 v v o voltage applied to any output in the high or low state (2) (3) ? 0.5 v cc + 0.5 v i ik input clamp current v i < 0 ? 50 ma i ok output clamp current v o < 0 ? 50 ma i o continuous output current 50 ma continuous current through v cc or gnd 100 ma t j junction temperature 150 c t stg storage temperature ? 65 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) the input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) the value of v cc is provided in the recommended operating conditions table. 6.2 esd ratings value unit human-body model (hbm), per ansi/esda/jedec js-001 (1) 2000 electrostatic v (esd) v discharge charged-device model (cdm), per jedec specification jesd22-c101 (2) 1000 (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 4 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11
sn74lvc1g11 www.ti.com sces487g ? september 2003 ? revised december 2015 6.3 recommended operating conditions see (1) . min max unit operating 1.65 5.5 v cc supply voltage v data retention only 1.5 v cc = 1.65 v to 1.95 v 0.65 v cc v cc = 2.3 v to 2.7 v 1.7 v ih high-level input voltage v v cc = 3 v to 3.6 v 2 v cc = 4.5 v to 5.5 v 0.7 v cc v cc = 1.65 v to 1.95 v 0.35 v cc v cc = 2.3 v to 2.7 v 0.7 v il low-level input voltage v v cc = 3 v to 3.6 v 0.8 v cc = 4.5 v to 5.5 v 0.3 v cc v i input voltage 0 5.5 v v o output voltage 0 v cc v v cc = 1.65 v ? 4 v cc = 2.3 v ? 8 i oh high-level output current ? 16 ma v cc = 3 v ? 24 v cc = 4.5 v ? 32 v cc = 1.65 v 4 v cc = 2.3 v 8 i ol low-level output current 16 ma v cc = 3 v 24 v cc = 4.5 v 32 v cc = 1.8 v 0.15 v, 2.5 v 0.2 v 20 t/ v input transition rise or fall rate v cc = 3.3 v 0.3 v 10 ns/v v cc = 5 v 0.5 v 10 t a operating free-air temperature ? 40 125 c (1) all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , scba004 . 6.4 thermal information sn74lvc1g11 thermal metric (1) dbv (sot-23) dck (sc70) dry (son) yzp (dsbga) dsf (son) unit 6 pins 6 pins 6 pins 6 pins 6 pins r ja junction-to-ambient thermal resistance 195.9 260.1 424.6 105.8 413.7 c/w r jctop junction-to-case (top) thermal resistance 177.4 98.1 309 1.6 226.6 c/w r jb junction-to-board thermal resistance 51.7 63.1 292 10.8 317 c/w jt junction-to-top characterization parameter 61.3 2.2 135.4 3.1 37.4 c/w jb junction-to-board characterization parameter 51.3 62.4 292 10.8 317 c/w r jcbot junction-to-case (bottom) thermal resistance ? ? ? ? ? c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report, spra953 . copyright ? 2003 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: sn74lvc1g11
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com 6.5 electrical characteristics over operating free-air temperature range (unless otherwise noted) parameter test conditions v cc min typ max unit v cc ? i oh = ? 100 a 1.65 v to 5.5 v 0.1 i oh = ? 4 ma 1.65 v 1.2 i oh = ? 8 ma 2.3 v 1.9 v oh v i oh = ? 16 ma 2.4 3 v i oh = ? 24 ma 2.3 i oh = ? 32 ma 4.5 v 3.8 i ol = 100 a 1.65 v to 5.5 v 0.1 i ol = 4 ma 1.65 v 0.45 i ol = 8 ma 2.3 v 0.3 v ol v i ol = 16 ma 0.4 3 v i ol = 24 ma 0.55 i ol = 32 ma 4.5 v 0.55 i i all inputs v i = 5.5 v or gnd 0 to 5.5 v 5 a i off v i or v o = 5.5 v 0 10 a i cc v i = 5.5 v or gnd, i o = 0 1.65 v to 5.5 v 10 a one input at v cc ? 0.6 v, i cc 3 v to 5.5 v 500 a other inputs at v cc or gnd c i v i = v cc or gnd 3.3 v 3.5 pf 6.6 switching characteristics, c l = 15 pf, t a = ? 40 c to 85 c over recommended operating free-air temperature range, c l = 15 pf (unless otherwise noted) (see figure 2 ) from to parameter v cc min max unit (input) (output) v cc = 1.8 v 0.15 v 2.6 15.2 v cc = 2.5 v 0.2 v 1.6 5.6 t pd a, b, or c y ns v cc = 3.3 v 0.3 v 1.2 4.1 v cc = 5 v 0.5 v 1 3.1 6.7 switching characteristics, c l = 30 pf or 50 pf, t a = ? 40 c to 85 c over recommended operating free-air temperature range, c l = 30 pf or 50 pf (unless otherwise noted) (see figure 3 ) from to parameter v cc min max unit (input) (output) v cc = 1.8 v 0.15 v 2.9 17.2 v cc = 2.5 v 0.2 v 1.4 6.2 t pd a, b, or c y ns v cc = 3.3 v 0.3 v 1.3 4.9 v cc = 5 v 0.5 v 1 3.5 6.8 switching characteristics, c l = 30 pf or 50 pf, t a = ? 40 c to 125 c over recommended operating free-air temperature range, c l = 30 pf or 50 pf (unless otherwise noted) (see figure 3 ) from to parameter v cc min max unit (input) (output) v cc = 1.8 v 0.15 v 2.9 20 v cc = 2.5 v 0.2 v 1.4 7.8 t pd a, b, or c y ns v cc = 3.3 v 0.3 v 1.3 6.2 v cc = 5 v 0.5 v 1 4.6 6 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11
sn74lvc1g11 www.ti.com sces487g ? september 2003 ? revised december 2015 6.9 operating characteristics t a = 25 c parameter test conditions v cc typ unit v cc = 1.8 v 18 v cc = 2.5 v 19 c pd power dissipation capacitance f = 10 mhz pf v cc = 3.3 v 20 v cc = 5 v 23 6.10 typical characteristics figure 1. output current drive vs high-level output voltage copyright ? 2003 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: sn74lvc1g11 C100 C80 C60 C40 C20 0 20 40 60 C1 C0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 t a = 25 c, v cc = 3 v, v ih = 3 v, v il = 0 v, all outputs switching v oh C v i oh C ma
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com 7 parameter measurement information figure 2. load circuit and voltage waveforms 8 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11 t h t su from output under test c (see note a) l load circuit s1 v load open gnd r l data input timing input 0 v0 v 0 v t w input 0 v input output waveform 1 s1 at v (see note b) load output waveform 2 s1 at gnd (see note b) v ol v oh 0 v? 0 v outputoutput t /t plh phl open test s1 output control v m v m v m v m v m 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v 5 v 0.5 v 1 m w 1 m w 1 m w 1 m w v cc r l 2 v cc 2 v cc 6 v 2 v cc v load c l 15 pf15 pf 15 pf 15 pf 0.15 v0.15 v 0.3 v0.3 v v d 3 v v i v cc /2 v cc /2 1.5 v v cc /2 v m 2 ns 2 ns 2.5 ns 2.5 ns inputs r l t /t r f v cc v cc v cc v load t /t plz pzl gnd t /t phz pzh voltage waveforms enable and disable times low- and high-level enabling voltage waveforms propagation delay times inverting and noninverting outputs notes: a. c includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z = 50 . d. the outputs are measured one at a time, with one transition per measurement. e. t and t are the same as t . f. t and t are the same as t . g. t and t are the same as t . h. all parameters and waveforms are not applicable to all devices. l o plz phz dis pzl pzh en plh phl pd w voltage waveforms pulse duration voltage waveforms setup and hold times v i v i v i v m v m v /2 load t pzl t plz t phz t pzh v C v oh d v + v ol d v m v m v m v m v ol v oh v i v i v oh v ol v m v m v m v m t plh t phl t plh t phl
sn74lvc1g11 www.ti.com sces487g ? september 2003 ? revised december 2015 parameter measurement information (continued) figure 3. load circuit and voltage waveforms copyright ? 2003 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: sn74lvc1g11 t h t su from output under test c (see note a) l load circuit s1 v load open gnd r l data input timing input 0 v0 v 0 v t w input 0 v input output waveform 1 s1 at v (see note b) load output waveform 2 s1 at gnd (see note b) v ol v oh 0 v? 0 v outputoutput test s1 t /t plh phl open output control v m v m v m v m v m 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v 5 v 0.5 v 1 k w 500 w 500 w 500 w v cc r l 2 v cc 2 v cc 6 v 2 v cc v load c l 30 pf30 pf 50 pf 50 pf 0.15 v0.15 v 0.3 v0.3 v v d 3 v v i v cc /2 v cc /2 1.5 v v cc /2 v m 2 ns 2 ns 2.5 ns 2.5 ns inputs r l t /t r f v cc v cc v cc v load t /t plz pzl gnd t /t phz pzh voltage waveforms enable and disable times low- and high-level enabling voltage waveforms propagation delay times inverting and noninverting outputs notes: a. c includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z = 50 . d. the outputs are measured one at a time, with one transition per measurement. e. t and t are the same as t . f. t and t are the same as t . g. t and t are the same as t . h. all parameters and waveforms are not applicable to all devices. l o plz phz dis pzl pzh en plh phl pd w voltage waveforms pulse duration voltage waveforms setup and hold times v i v i v i v m v m v /2 load t pzl t plz t phz t pzh v C v oh d v + v ol d v m v m v m v m v ol v oh v i v i v oh v ol v m v m v m v m t plh t phl t plh t phl
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com 8 detailed description 8.1 overview this 3-input and gate is designed for 1.65-v to 5.5-v v cc operation. the sn74lvc1g11 device features a three-input and gate. the output state is determined by eight patterns of 3-bit input. all inputs can be connected to v cc or gnd. this device is fully-specified for partial-power-down applications using i off . the i off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 8.2 functional block diagram 8.3 feature description the sn74lvc1g11 device has a wide operating v cc range of 1.65 v to 5.5 v, which allows use in a broad range of systems. the 5.5-v i/os allow down translation and also allow voltages at the inputs when v cc = 0 v. 8.4 device functional modes table 1 lists the functional modes of sn74lvc1g11. table 1. function table inputs output y a b c h h h h l x x l x l x l x x l l 10 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11 ac y b
sn74lvc1g11 www.ti.com sces487g ? september 2003 ? revised december 2015 9 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. validate and test the design implementation to confirm system functionality. 9.1 application information the sn74lvc1g11 device offers logical and configuration for many design applications. this example describes basic power sequencing using the and gate configuration. power sequencing is often used in applications that require a processor or other delicate device with specific voltage timing requirements in order to protect the device from malfunctioning. in the application below, the power-good signals from the supplies tell the mcu to continue an operation. 9.2 typical application figure 4. typical application diagram 9.2.1 design requirements ? recommended input conditions: ? for rise time and fall time specifications, see t/ v in the recommended operating conditions table. ? for specified high and low levels, see v ih and v il in the recommended operating conditions table. ? inputs and outputs are overvoltage tolerant and can therefore go as high as 5.5 v at any valid v cc . ? recommended output conditions: ? load currents must not exceed 50 ma. ? frequency selection criterion: ? figure 5 illustrates the effects of frequency on output current. ? added trace resistance and capacitance can reduce maximum frequency capability. follow the layout practices listed in the layout section. copyright ? 2003 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: sn74lvc1g11 sup ply 1 0.1 f sup ply2 sup ply 3 vcc 3.3v mcu
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com typical application (continued) 9.2.2 detailed design procedure the sn74lvc1g11 device uses cmos technology and has balanced output drive. avoid bus contentions that can drive currents that can exceed maximum limits. the sn74lvc1g11 allows for performing the logical and function with digital signals. maintain input signals as close as possible to either 0 v or v cc for optimal operation. 9.2.3 application curve v cc = 5 v figure 5. simulated input-to-output voltage response showing propagation delay 10 power supply recommendations the power supply can be any voltage between the minimum and maximum supply voltage rating listed in the recommended operating conditions table. to prevent power disturbance, ensure good bypass capacitance for each v cc terminal. for devices with a single- supply, a 0.1- f bypass capacitor is recommended. if multiple pins are labeled v cc , then a 0.01- f or 0.022- f capacitor is recommended for each v cc because the v cc pins are tied together internally. for devices with dual supply pins operating at different voltages, for example v cc and v dd , a 0.1- f bypass capacitor is recommended for each supply pin. to reject different frequencies of noise, use multiple bypass capacitors in parallel. capacitors with values of 0.1 f and 1 f are commonly used in parallel. place the bypass capacitor as close to the power terminal as possible for best results. 12 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11 0 1 2 3 4 5 0 1 2 3 4 5 6 7 8 9 10 signal (v) time (ns) vin vout c001
sn74lvc1g11 www.ti.com sces487g ? september 2003 ? revised december 2015 11 layout 11.1 layout guidelines when using multiple-bit logic devices, inputs must never float. in many cases, functions (or parts of functions) of digital logic devices are unused, for example, when only two inputs of a triple-input and gate are used or when only 3 of the 4 buffer gates are used. such input pins must not be left unconnected, because the undefined voltages at the outside connections result in undefined operational states. figure 6 specifies the rules that must be observed under all circumstances. all unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. the logic level that must be applied to any particular unused input depends on the function of the device. generally they are tied to gnd or v cc , whichever makes more sense or is more convenient. it is generally acceptable to float outputs, unless the part is a transceiver. if the transceiver has an output enable pin, it disables the output section of the part when asserted, which does not disable the input section of the i/os. therefore, the i/os cannot float when disabled. 11.2 layout example figure 6. layout diagrams copyright ? 2003 ? 2015, texas instruments incorporated submit documentation feedback 13 product folder links: sn74lvc1g11 v cc unused input input output input unused input output
sn74lvc1g11 sces487g ? september 2003 ? revised december 2015 www.ti.com 12 device and documentation support 12.1 documentation support 12.1.1 related documentation for related documentation see the following: ? implications of slow or floating cmos inputs , scba004 ? selecting the right texas instruments signal switch , szza030 12.2 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 12.3 trademarks nanofree, e2e are trademarks of texas instruments. all other trademarks are the property of their respective owners. 12.4 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 13 mechanical, packaging, and orderable information the following pages include mechanical packaging and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser based versions of this data sheet, refer to the left hand navigation. 14 submit documentation feedback copyright ? 2003 ? 2015, texas instruments incorporated product folder links: sn74lvc1g11
package option addendum www.ti.com 5-dec-2015 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples sn74lvc1g11dbvr active sot-23 dbv 6 3000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (c115 ~ c11f ~ c11k ~ c11r) sn74lvc1g11dbvre4 active sot-23 dbv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c11f SN74LVC1G11DBVRG4 active sot-23 dbv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c11f sn74lvc1g11dckr active sc70 dck 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c35 ~ c3f ~ c3k ~ c3r) sn74lvc1g11dckre4 active sc70 dck 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c35 ~ c3f ~ c3k ~ c3r) sn74lvc1g11dckrg4 active sc70 dck 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c35 ~ c3f ~ c3k ~ c3r) sn74lvc1g11dryr active son dry 6 5000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c3 sn74lvc1g11dsfr active son dsf 6 5000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 c3 sn74lvc1g11yzpr active dsbga yzp 6 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 85 (c32 ~ c37 ~ c3n) (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material)
package option addendum www.ti.com 5-dec-2015 addendum-page 2 (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of sn74lvc1g11 : ? automotive: sn74lvc1g11-q1 ? enhanced product: sn74lvc1g11-ep note: qualified version definitions: ? automotive - q100 devices qualified for high-reliability automotive applications targeting zero defects ? enhanced product - supports defense, aerospace and medical applications
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74lvc1g11dbvr sot-23 dbv 6 3000 180.0 9.2 3.17 3.23 1.37 4.0 8.0 q3 sn74lvc1g11dbvr sot-23 dbv 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 SN74LVC1G11DBVRG4 sot-23 dbv 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 sn74lvc1g11dckr sc70 dck 6 3000 180.0 9.2 2.3 2.55 1.2 4.0 8.0 q3 sn74lvc1g11dckr sc70 dck 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 q3 sn74lvc1g11dryr son dry 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 q1 sn74lvc1g11dsfr son dsf 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 q2 sn74lvc1g11yzpr dsbga yzp 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 q1 package materials information www.ti.com 18-jan-2016 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) sn74lvc1g11dbvr sot-23 dbv 6 3000 205.0 200.0 33.0 sn74lvc1g11dbvr sot-23 dbv 6 3000 180.0 180.0 18.0 SN74LVC1G11DBVRG4 sot-23 dbv 6 3000 180.0 180.0 18.0 sn74lvc1g11dckr sc70 dck 6 3000 205.0 200.0 33.0 sn74lvc1g11dckr sc70 dck 6 3000 180.0 180.0 18.0 sn74lvc1g11dryr son dry 6 5000 184.0 184.0 19.0 sn74lvc1g11dsfr son dsf 6 5000 184.0 184.0 19.0 sn74lvc1g11yzpr dsbga yzp 6 3000 220.0 220.0 35.0 package materials information www.ti.com 18-jan-2016 pack materials-page 2

www.ti.com c 6x 0.22 0.12 6x 0.45 0.35 2x 0.7 4x 0.35 0.4 max 0.05 0.00 a 1.05 0.95 b 1.05 0.95 (0.11) typ (0.1) pin 1 id 4208186/f 10/2014 pin 1 index area seating plane 0.05 c 1 3 4 6 0.07 c a b 0.05 c symm symm notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. reference jedec registration mo-287, variation x2aaf. mechanical data dsf (s-px2son-n6) plastic small outline no-lead

www.ti.com package outline c 0.5 max 0.19 0.15 1 typ 0.5 typ 6x 0.25 0.21 0.5 typ b e a d 4219524/a 06/2014 dsbga - 0.5 mm max height yzp0006 die size ball grid array notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. nanofree tm package configuration. nanofree is a trademark of texas instruments. ball a1 corner seating plane ball typ 0.05 c b a 1 2 0.015 c a b symm symm c scale 9.000d: max = e: max = 1.418 mm, min = 0.918 mm, min = 1.358 mm0.858 mm
www.ti.com example board layout 6x ( )0.225 (0.5) typ (0.5) typ ( ) metal 0.225 0.05 max solder mask opening metal under mask ( ) solder mask opening 0.225 0.05 min 4219524/a 06/2014 dsbga - 0.5 mm max height yzp0006 die size ball grid array notes: (continued) 4. final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. for more information, see texas instruments literature number sbva017 (www.ti.com/lit/sbva017). symm symm land pattern example scale:40x 1 2 a b c non-solder mask defined (preferred) solder mask details not to scale solder mask defined
www.ti.com example stencil design (0.5) typ (0.5) typ 6x ( 0.25) (r ) typ0.05 metal typ 4219524/a 06/2014 dsbga - 0.5 mm max height yzp0006 die size ball grid array notes: (continued) 5. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. symm symm solder paste example based on 0.1 mm thick stencil scale:40x 1 2 a b c
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per jesd46, latest issue, and to discontinue any product or service per jesd48, latest issue. buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all semiconductor products (also referred to herein as ? components ? ) are sold subject to ti ? s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in ti ? s terms and conditions of sale of semiconductor products. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. ti assumes no liability for applications assistance or the design of buyers ? products. buyers are responsible for their products and applications using ti components. to minimize the risks associated with buyers ? products and applications, buyers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which ti components or services are used. information published by ti regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of significant portions of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti components or services with statements different from or beyond the parameters stated by ti for that component or service voids all express and any implied warranties for the associated ti component or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of ti components in its applications, notwithstanding any applications-related information or support that may be provided by ti. buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. buyer will fully indemnify ti and its representatives against any damages arising out of the use of any ti components in safety-critical applications. in some cases, ti components may be promoted specifically to facilitate safety-related applications. with such components, ti ? s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. nonetheless, such components are subject to these terms. no ti components are authorized for use in fda class iii (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. only those ti components which ti has specifically designated as military grade or ? enhanced plastic ? are designed and intended for use in military/aerospace applications or environments. buyer acknowledges and agrees that any military or aerospace use of ti components which have not been so designated is solely at the buyer ' s risk, and that buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti has specifically designated certain components as meeting iso/ts16949 requirements, mainly for automotive use. in any case of use of non-designated products, ti will not be responsible for any failure to meet iso/ts16949. products applications audio www.ti.com/audio automotive and transportation www.ti.com/automotive amplifiers amplifier.ti.com communications and telecom www.ti.com/communications data converters dataconverter.ti.com computers and peripherals www.ti.com/computers dlp ? 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